UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 429
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Address: F0061H
Address: F0062H
Symbol
NFEN1
Symbol
NFEN2
Note SCK41 pin is only mounted in the
TNFEN02
TNFEN01
TNFEN00
TNFEN13
TNFEN12
TNFEN11
TNFEN10
TNFEN07
0
1
0
1
0
1
0
1
0
1
0
1
0
1
7
7
0
After reset: 00H
After reset: 00H
Figure 8-28. Format of Noise Filter Enable Registers 1, 2 (NFEN1, NFEN2)
Noise filter OFF
Noise filter ON
Noise filter OFF
Noise filter ON
Noise filter OFF
Noise filter ON
Noise filter OFF
Noise filter ON
Noise filter OFF
Noise filter ON
Noise filter OFF
Noise filter ON
Noise filter OFF
Noise filter ON
TNFEN06
6
6
0
R/W
R/W
Enable/disable using noise filter of TI01/TO01/INTP5/P16 pin input signal
TNFEN05
Enable/disable using noise filter of TI02/TO02/P17 pin input signal
Enable/disable using noise filter of TI13/TO13/P67 pin input signal
Enable/disable using noise filter of TI12/TO12/P66 pin input signal
Enable/disable using noise filter of TI11/TO11/P65 pin input signal
Enable/disable using noise filter of TI10/TO10/P64 pin input signal
(78K0R/KF3-L, 78K0R/KG3-L) (2/2)
Enable/disable using noise filter of the following pin input signal
5
5
0
μ
PD78F1027 and 78F1028.
TNFEN04
78K0R/KF3-L: SCK41
4
4
0
78K0R/KG3-L: TI00/P00 pin
TNFEN03
TNFEN13
3
3
Note
/TI00/P53 pin
TNFEN02
TNFEN12
CHAPTER 8 TIMER ARRAY UNIT
2
2
TNFEN01
TNFEN11
1
1
TNFEN00
TNFEN10
0
0
429
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