UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 165
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UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 165 of 1171
- Download datasheet (8Mb)
78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Remark For extended SFRs (2nd SFRs), see Table 4-6 Extended SFR (2nd SFR) List.
Address Special Function Register (SFR) Name
FFFE6H Interrupt mask flag register 1L
FFFE7H Interrupt mask flag register 1H
FFFE8H Priority specification flag register
FFFE9H Priority specification flag register
FFFEAH Priority specification flag register
FFFEBH Priority specification flag register
FFFECH Priority specification flag register
FFFEDH Priority specification flag register
FFFEEH Priority specification flag register
FFFEFH Priority specification flag register
FFFF0H
FFFF1H
FFFF2H
FFFF3H
FFFF4H
FFFF5H
FFFF6H
FFFF7H
FFFFEH Processor mode control register PMC
00L
00H
01L
01H
10L
10H
11L
11H
Multiplication/division data register
A (L)
Multiplication/division data register
A (H)
Multiplication/division data register
B (H)
Multiplication/division data register
B (L)
MK1H
PR00L
PR00H
PR01L
PR01H
PR10L
PR10H
PR11L
PR11H
MDAL/MULA
MDAH/MULB
MDBH/MULOH R/W
MDBL/MULOL R/W
MK1L
Symbol
Table 4-5. SFR List (6/6)
PR00
PR01
PR10
PR11
MK1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Manipulable Bit Range
1-bit
√
√
√
√
√
√
√
√
√
√
−
−
−
−
√
8-bit
√
√
√
√
√
√
√
√
√
√
−
−
−
−
√
16-bit
CHAPTER 4 CPU ARCHITECTURE
√
√
√
√
√
√
√
√
√
−
After Reset
0000H
0000H
0000H
0000H
FFH
FFH
FFH
FFH
FFH
FFH
FFH
FFH
FFH
FFH
00H
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
165
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