DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 740

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 13 Port Output Enable (POE)
Table 13.2 shows output-level comparisons with pin combinations.
Table 13.2 Pin Combinations
Rev. 3.00 May 17, 2007 Page 682 of 1582
REJ09B0181-0300
Pin Combination
PE9/TIOC3B and PE11/TIOC3D
PE12/TIOC4A and PE14/TIOC4C
PE13/TIOC4B and PE15/TIOC4D
PD9/TIOC3BS and PD11/TIOC3DS
PD12/TIOC4AS and PD14/TIOC4CS
PD13/TIOC4BS and PD15/TIOC4DS
PD29/TIOC3BS and PD28/TIOC3DS
PD27/TIOC4AS and PD25/TIOC4CS
PD26/TIOC4BS and PD24/TIOC4DS
PE16/TIOC3BS and PE17/TIOC3DS
PE18/TIOC4AS and PE20/TIOC4CS
PE19/TIOC4BS and PE21/TIOC4DS
I/O
Output The high-current pins for the MTU2 are placed in
Output The high-current pins for the MTU2S are placed in
Description
high-impedance state when the pins
simultaneously output an active level (low level
when the output level select P (OLSP) bit of the
timer output control register (TOCR) in the MTU2 is
0 or high level when the bit is 1) for one or more
cycles of the peripheral clock (Pφ).
This active level comparison is done when the
MTU2 output function or general output function is
selected in the pin function controller. If another
function is selected, the output level is not
checked.
Pin combinations for output comparison and high-
impedance control can be selected by POE
registers.
high-impedance state when the pins
simultaneously output an active level (low level
when the output level select P (OLSP) bit of the
timer output control register (TOCR) in the MTU2S
is 0 or high level when the bit is 1) for one or more
cycles of the peripheral clock (Pφ).
This active level comparison is done when the
MTU2S output function or general output function
is selected in the pin function controller. If another
function is selected, the output level is not
checked.
Pin combinations for output comparison and high-
impedance control can be selected by POE
registers.