DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 1020

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 19 A/D Converter (ADC)
19.4
The A/D converter operates by successive approximation with 10-bit resolution. It has two
operating modes; single mode and scan mode. There are two kinds of scan mode: continuous
mode and single-cycle mode. When changing the operating mode or analog input channel, in order
to prevent incorrect operation, first clear the ADST bit to 0 in ADCR.
19.4.1
In single mode, A/D conversion is to be performed only once on the specified single channel. The
operations are as follows.
1. A/D conversion is started when the ADST bit in ADCR is set to 1, according to software,
2. When A/D conversion is completed, the result is transferred to the A/D data register
3. On completion of conversion, the ADF bit in ADCSR is set to 1. If the ADIE bit is set to 1 at
4. The ADST bit remains set to 1 during A/D conversion. When A/D conversion ends, the ADST
19.4.2
In continuous scan mode, A/D conversion is to be performed sequentially on the specified
channels (up to four channels in SH7083/SH7084/SH7085 and up to eight channels in SH7086).
1. When the ADST bit in ADCR is set to 1 by software, MTU2, MTU2S, or external trigger
2. When A/D conversion for each channel is completed, the result is sequentially transferred to
3. When conversion of all the selected channels is completed, the ADF bit in ADCSR is set to 1.
4. Steps 2 to 3 are repeated as long as the ADST bit remains set to 1. When the ADST bit is
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MTU2, MTU2S, or external trigger input.
corresponding to the channel.
this time, an ADI interrupt request is generated.
bit is automatically cleared to 0 and the A/D converter enters the idle state.
When the ADST bit is cleared to 0 during A/D conversion, A/D conversion stops and the A/D
converter enters the idle state.
input, A/D conversion starts on the channel with the lowest number in the group (AN0, AN1,
..., AN7).
the A/D data register corresponding to each channel.
If the ADIE bit is set to 1 at this time, an ADI interrupt is requested after A/D conversion ends.
Conversion of the first channel in the group starts again.
cleared to 0, A/D conversion stops and the A/D converter enters the idle state.
Operation
Single Mode
Continuous Scan Mode