DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 1341

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

23.9
23.9.1
The boot program activated in boot mode communicates with the host via the on-chip SCI of the
LSI. The specifications of the serial communications interface between the host and the boot
program are described below.
• States of the boot program
The boot program has three states.
1. Bit-rate matching state
2. Inquiry-and-selection state
3. Programming/erasure state
Figure 23.22 shows the flow of processing by the boot program.
In this state, the boot program adjusts the bit rate to match that of the host. When the chip
starts up in boot mode, the boot program is activated and enters the bit-rate matching state, in
which it receives commands from the host and adjusts the bit rate accordingly. After bit-rate
matching is complete, the boot program proceeds to the inquiry-and-selection state.
In this state, the boot program responds to inquiry commands from the host. The device, clock
mode, and bit rate are selected in this state. After making these selections, the boot program
enters the programming/erasure state in response to the transition-to-programming/erasure
state command. The boot program transfers the erasure program to RAM and executes erasure
of the user MAT and user boot MAT before it enters the programming/erasure state.
In this state, programming/erasure are executed. The boot program transfers the program for
programming/erasure to RAM in line with the command received from the host and executes
programming/erasure. It also performs sum checking and blank checking as directed by the
respective commands.
Supplementary Information
Specifications of the Standard Serial Communications Interface in Boot Mode
Rev. 3.00 May 17, 2007 Page 1283 of 1582
Section 23 Flash Memory
REJ09B0181-0300