DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 535

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

11.3.8
TICCR is an 8-bit readable/writable register that specifies input capture conditions when TCNT_1
and TCNT_2 are cascaded. The MTU2 has one TICCR in channel 1.
Bit
0
Bit
7 to 4
3
Bit Name
TTSA
Bit Name
—
I2BE
Timer Input Capture Control Register (TICCR)
Initial value:
Initial
Value
0
Initial
Value
All 0
0
R/W:
Bit:
R
7
0
-
R/W
R/W
R/W
R
R/W
R
6
0
-
Description
Timing Select A
Specifies the timing for transferring data from TGRC to
TGRA in each channel when they are used together for
buffer operation. When using a channel in other than
PWM mode, do not set this bit to 1.
0: When compare match A occurs in each channel
1: When TCNT is cleared in each channel
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Input Capture Enable
Specifies whether to include the TIOC2B pin in the
TGRB_1 input capture conditions.
0: Does not include the TIOC2B pin in the TGRB_1
1: Includes the TIOC2B pin in the TGRB_1 input
R
5
0
-
capture conditions
input capture conditions
R
4
0
-
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
R/W
I2BE
3
0
Rev. 3.00 May 17, 2007 Page 477 of 1582
R/W
I2AE
2
0
R/W
I1BE
1
0
R/W
I1AE
0
0
REJ09B0181-0300