DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 1239

IC SUPERH MCU FLASH 112LQFP

DF70845AD80FPV

Manufacturer Part Number
DF70845AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet

Specifications of DF70845AD80FPV

Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
32KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF70845AD80FPV
Manufacturer:
TAIYO
Quantity:
40 000
Part Number:
DF70845AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
22.2.3
The port B port register L (PBPRL) is a 16-bit read-only register that always returns the states of
the pins regardless of the PFC setting. Bits PB9PR to PB4PR and PB2PR to PB0PR correspond to
pins PB9 to PB4 and PB2 to PB0, respectively (multiplexed functions omitted here) in the
SH7083. Bits PB9PR to PB0PR correspond to pins PB9 to PB0 (multiplexed functions omitted
here) in the SH7084, SH7085, and SH7086
• PBPRL (SH7083)
Initial value:
Bit
15 to 10
9
8
7
6
5
4
3
2
1
0
R/W:
Bit:
Port B Port Register L (PBPRL)
15
R
0
-
Bit Name
PB9PR
PB8PR
PB7PR
PB6PR
PB5PR
PB4PR
PB2PR
PB1PR
PB0PR
14
R
0
-
13
R
0
-
Initial
Value
All 0
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
0
Pin state R
Pin state R
Pin state R
12
R
0
-
11
R
0
-
R/W
R
R
10
R
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
The pin state is returned regardless of the PFC setting.
These bits cannot be modified.
Reserved
This bit is always read as 0. The write value should
always be 0.
The pin state is returned regardless of the PFC setting.
These bits cannot be modified.
PB9
PR
R
9
*
PB8
PR
R
8
*
PB7
PR
R
7
*
Rev. 3.00 May 17, 2007 Page 1181 of 1582
PB6
PR
R
6
*
PB5
PR
R
5
*
PB4
PR
R
4
*
R
3
0
-
Section 22 I/O Ports
REJ09B0181-0300
PB2
PR
R
2
*
PB1
PR
R
1
*
PB0
PR
R
0
*

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