DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 1381

IC SUPERH MCU FLASH 112LQFP

DF70845AD80FPV

Manufacturer Part Number
DF70845AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet

Specifications of DF70845AD80FPV

Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
32KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF70845AD80FPV
Manufacturer:
TAIYO
Quantity:
40 000
Part Number:
DF70845AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
This LSI is available with 256 Kbytes of on-chip mask ROM. The on-chip ROM is connected to
the CPU, direct memory access controller (DMAC), and data transfer controller (DTC) through a
32-bit data bus (figure 24.1). The CPU, DMAC, and DTC can access the on-chip ROM in 8, 16
and 32-bit widths. Data in the on-chip ROM can always be accessed in one cycle.
The operating mode determines whether the on-chip ROM is valid or not. The operating mode is
selected using mode-setting pins FEW, MD1, and MD0. If you are using the on-chip ROM, select
mode 2 or mode 3; if you are not, select mode 0 or 1. The on-chip ROM is allocated to addresses
H'00000000 to H'0003FFFF of memory area 0.
RAM0200A_010020030800
H'0003FFFC
H'00000000
H'00000004
Figure 24.1 Mask ROM Block Diagram
Section 24 Mask ROM
H'0003FFFD
H'00000001
H'00000005
Internal data bus (32 bits)
On-chip ROM
H'0003FFFE
H'00000002
H'00000006
Rev. 3.00 May 17, 2007 Page 1323 of 1582
H'0003FFFF
H'00000003
H'00000007
Section 24 Mask ROM
REJ09B0181-0300

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