MCF5272CVF66J Freescale Semiconductor, MCF5272CVF66J Datasheet - Page 59
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MCF5272CVF66J
Manufacturer Part Number
MCF5272CVF66J
Description
IC MCU 166MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Leaded Process Compatible
No
Rohs Compliant
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5272CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Freescale Semiconductor
0x1092
0x1096
0x109A
0x109E
0x10A2
0x10A6
0x10AA
0x10AC
0x10B0
0x10B4
0x10B8
0x10BC
0x10C0
0x10C4
0x10C8
0x10CE
0x10D2
0x10D6
0x10DA
0x10DE
0x10E2
0x10E6
0x10EA
0x1400–
0x17FF
MBAR
Offset
USB Endpoint 1 Interrupt Mask Register
USB Endpoint 2 Interrupt Mask Register
USB Endpoint 3 Interrupt Mask Register
USB Endpoint 4 Interrupt Mask Register
USB Endpoint 5 Interrupt Mask Register
USB Endpoint 6 Interrupt Mask Register
USB Endpoint 7 Interrupt Mask Register
USB Endpoint 0 Data Register
USB Endpoint 1 Data Register
USB Endpoint 2 Data Register
USB Endpoint 3 Data Register
USB Endpoint 4 Data Register
USB Endpoint 5 Data Register
USB Endpoint 6 Data Register
USB Endpoint 7 Data Register
USB Endpoint 0 Data Present Register
USB Endpoint 1 Data Present Register
USB Endpoint 2 Data Present Register
USB Endpoint 3 Data Present Register
USB Endpoint 4 Data Present Register
USB Endpoint 5 Data Present Register
USB Endpoint 6 Data Present Register
USB Endpoint 7 Data Present Register
USB Configuration RAM, 1 K Bytes
The MBAR Offset column corresponds to the tables found in
“List of Memory
1, 2, or 3 bytes from the offset address shown above. Refer to the
appropriate discussions in this document for actual positioning of 16- or
8-bit registers in a 32-bit long word.
MCF5272 ColdFire
Table xvi. USB Module Memory Map (continued)
Register Name
Maps.” 16- and/or 8-bit wide registers may be offset by 0,
®
Integrated Microprocessor User’s Manual, Rev. 3
NOTE
USBEPIMR1
USBEPIMR2
USBEPIMR3
USBEPIMR4
USBEPIMR5
USBEPIMR6
USBEPIMR7
USBEPDAT0
USBEPDAT1
USBEPDAT2
USBEPDAT3
USBEPDAT4
USBEPDAT5
USBEPDAT6
USBEPDAT7
USBEPDP0
USBEPDP1
USBEPDP2
USBEPDP3
USBEPDP4
USBEPDP5
USBEPDP6
USBEPDP7
USB_CFG_RAM
Old Mnemonic
Appendix A,
EP1IMR
EP2IMR
EP3IMR
EP4IMR
EP5IMR
EP6IMR
EP7IMR
EP0DR
EP1DR
EP2DR
EP3DR
EP4DR
EP5DR
EP6DR
EP7DR
EP0DPR
EP1DPR
EP2DPR
EP3DPR
EP4DPR
EP5DPR
EP6DPR
EP7DPR
No change
New Mnemonic
lix
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