MCF5272CVF66J Freescale Semiconductor, MCF5272CVF66J Datasheet - Page 287
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MCF5272CVF66J
Manufacturer Part Number
MCF5272CVF66J
Description
IC MCU 166MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Leaded Process Compatible
No
Rohs Compliant
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5272CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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A device may support multiple configurations. Within any one configuration, the device may support
multiple interfaces. An interface consists of a set of endpoints that presents to the host a single feature or
function of the device. An interface within a configuration may have alternate settings that redefine the
characteristics of the associated endpoints. All devices must provide a device descriptor and at least one
configuration, interface and endpoint descriptor. Each configuration must have at least one interface and
one endpoint descriptor. Only one configuration is effective at any time, but several interfaces and their
related endpoints may be operational at the same time. Only one setting for a particular interface is
effective at any time.
12.3.3.2
The example descriptor structure in
to Chapter 9 of the USB Specification for information on the contents of each descriptor.
This example is described in the configuration RAM sequence shown below. The device descriptor begins
at address MBAR + 0x1400. Each descriptor must immediately follow the previous descriptor without any
empty locations between them.
Freescale Semiconductor
1. Device Descriptor
2. Configuration #1 Descriptor
3. Interface #0 Descriptor
4. Endpoint #1 Descriptor
5. Endpoint #2 Descriptor
6. Interface #1 Descriptor
7. Endpoint #3 Descriptor
8. Configuration #2 Descriptor
Endpoint #1
Descriptor
USB Device Configuration Example
Interface #0
Descriptor
Figure 12-23. Example USB Configuration Descriptor Structure
MCF5272 ColdFire
Endpoint #2
Descriptor
Configuration #1
Descriptor
Figure 12-23
®
Interface #1
Endpoint #3
Descriptor
Descriptor
Integrated Microprocessor User’s Manual, Rev. 3
Descriptor
Device
shows a device with three different configurations. Refer
Configuration #2
Endpoint #1
Interface #0
Descriptor
Descriptor
Descriptor
Endpoint #1
Descriptor
Configuration #3
Interface #0
Descriptor
Descriptor
Universal Serial Bus (USB)
Endpoint #2
Descriptor
12-29
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