MCF5272CVF66J Freescale Semiconductor, MCF5272CVF66J Datasheet - Page 322
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MCF5272CVF66J
Manufacturer Part Number
MCF5272CVF66J
Description
IC MCU 166MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Leaded Process Compatible
No
Rohs Compliant
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5272CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Physical Layer Interface Controller (PLIC)
13.5.14 GCI Monitor Channel Transmit Abort Register (PGMTA)
All bits in this register are read/write and are cleared on hardware or software reset.
The PGMTA register contains the abort control bits for each of the four ports on the MCF5272 for the
transmit monitor channel.
13-26
Bits
3–0
7
6
5
4
Name
AR3
AR2
AR1
AR0
—
Abort request, port 3.
0 Default reset value.
1 Set by the CPU, this bit causes the monitor channel controller to transmit the end of message signal on the
Abort request, port 2. See AR3.
Abort request, port 1. See AR3.
Abort request, port 0. See AR3.
Reserved, should be cleared.
E bit. Automatically cleared by the monitor channel controller on receiving an abort, that is, when PGMTS[AB]
is set.
Figure 13-26. GCI Monitor Channel Transmit Abort Register (PGMTA)
Reset
Field
Addr
R/W
MCF5272 ColdFire
AR3
7
Table 13-9. PGMTA Field Descriptions
AR2
6
®
Integrated Microprocessor User’s Manual, Rev. 3
AR1
5
MBAR + 0x372
AR0
0000_0000
Read/Write
4
Description
3
—
0
Freescale Semiconductor
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