MCF5272CVF66J Freescale Semiconductor, MCF5272CVF66J Datasheet - Page 453
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MCF5272CVF66J
Manufacturer Part Number
MCF5272CVF66J
Description
IC MCU 166MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Leaded Process Compatible
No
Rohs Compliant
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5272CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Figure 20-2
The four bytes shown are connected through the internal data bus and data multiplexer to the external data
bus. This path is how the MCF5272 supports programmable port sizing and operand misalignment. The
data multiplexer establishes the necessary connections for different combinations of address and data
sizes.
The multiplexer takes the four bytes of the 32-bit bus and routes them to their required positions. For
example, OP3 can be routed to D[7:0], as would be the normal case when interfacing to a 32-bit port. OP3
can be routed to D[23:16] for interfacing to a 16-bit port, or it can be routed to D[31:24] for interfacing to
an 8-bit port. The operand size, address, and port size of the memory being accessed determines the
positioning of bytes.
Freescale Semiconductor
REGISTER
MULTIPLEXER
EXTERNAL
ADDRESS
DATA BUS
shows the required organization of data ports on the MCF5272 for 8-, 16-, and 32 bit devices.
31
A1
OP0
0
0
1
0
0
1
1
MCF5272 ColdFire
A0
Figure 20-2. MCF5272 Interface to Various Port Sizes
0
0
0
0
1
0
1
Figure 20-1. Internal Operand Representation
OP1
D[31:24]
BYTE 0
BYTE 0
BYTE 2
BYTE 0
BYTE 1
BYTE 2
BYTE 3
OP0
®
ROUTING AND DUPLICATION
Integrated Microprocessor User’s Manual, Rev. 3
15
OP2
D[23:16]
OP2
BYTE 1
BYTE 1
BYTE 3
OP1
8-BIT PORT
7
BYTE 2
D[15:8]
OP3
OP3
OP2
OP3
16-BIT PORT
0
0
0
BYTE 3
D[7:0]
OP3
LONGWORD OPERAND
BYTE OPERAND
WORD OPERAND
32-BIT PORT
INTERNAL TO
MCF5272
Bus Operation
20-5
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