MCF5272CVF66J Freescale Semiconductor, MCF5272CVF66J Datasheet - Page 52
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MCF5272CVF66J
Manufacturer Part Number
MCF5272CVF66J
Description
IC MCU 166MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Leaded Process Compatible
No
Rohs Compliant
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5272CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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lii
0x00AC
0x00B0
0x00B4
0x00C0
0x00C4
0x00C8
0x00D0
0x00D4
0x00D8
0x00E0
0x00E6
0x00E8
0x00EC
0x00F0
0x0100
0x0104
0x0104
0x0108
0x010C
0x010C
MBAR
MBAR
MBAR
MBAR
Offset
Offset
Offset
Offset
QSPI Interrupt Register
QSPI Address Register
QSPI Data Register
PWM Control Register 0
PWM Control Register 1
PWM Control Register 2
PWM Pulse-Width Register 0
PWM Pulse-Width Register 1
PWM Pulse-Width Register 2
DMA Mode Register
DMA Interrupt Register
DMA Byte Count Register
DMA Source Address Register
DMA Destination Address Register
UART0 Mode Register 1/2
UART0 Status
UART0 Clock Select Register
UART0 Command Register
UART0 Receive Buffer
UART0 Transmit Buffer
MCF5272 ColdFire
Table vii. QSPI Module Memory Map (continued)
Register Name
Register Name
Register Name
Register Name
Table x. UART0 Module Memory Map
Table viii. PWM Module Memory Map
Table ix. DMA Module Memory Map
®
Integrated Microprocessor User’s Manual, Rev. 3
SPINT
SPADDR
SPDATA
PWMCR1
PWMCR2
PWMCR3
PWMWD1
PWMWD2
PWMWD3
DCMR
DCIR
DBCR
DSAR
DDAR
U1MR1/U1MR2
U1SR
U1CSR
U1CR
U1RxB
U1TxB
Old Mnemonic
Old Mnemonic
Old Mnemonic
Old Mnemonic
Freescale Semiconductor
QIR
QAR
QDR
PWCR0
PWCR1
PWCR2
PWWD0
PWWD1
PWWD2
No change
No change
No change
No change
No change
U0MR1/U0MR2
U0SR
U0CSR
U0CR
U0RxB
U0TxB
New Mnemonic
New Mnemonic
New Mnemonic
New Mnemonic
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