MCF5272CVF66J Freescale Semiconductor, MCF5272CVF66J Datasheet - Page 531
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MCF5272CVF66J
Manufacturer Part Number
MCF5272CVF66J
Description
IC MCU 166MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Leaded Process Compatible
No
Rohs Compliant
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5272CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Index
A
Access control register,
ACR0 and ACR1,
Activate low-power register,
Address bus,
Address variant,
Addressing
Addressing mode summary,
Arbitration, bus,
Architecture overview,
Async inputs signal timing,
Audience,
B
Baud rate
Branch instruction execution
Buffer descriptors
Buffering and impedance matching,
Bus
Byte strobes,
Freescale Semiconductor
mode summary,
calculating,
selection,
timing,
Ethernet,
USB controller,
arbitration,
burst data transfers,
configurations overview,
data transfer mechanism,
errors,
exceptions,
external interface,
external interface types,
interface for FLASH/SRAM,
interrupt acknowledge cycles,
master reset,
misaligned operands,
normal reset,
read/write (R/W),
reset operation,
sizing,
soft reset operation,
software watchdog timer reset operation,
transfer acknowledge (TA),
transfer error acknowledge (TEA),
20-19
20-4
2-25
1-xl
11-34
14-6
20-2
20-8
20-21
20-3
16-20
20-22
20-23
5-4
20-21
20-21
11-34
4-14
2-12
20-2
1-5
20-17
20-25
1-4
20-18
4-14
MCF5272 ColdFire
20-7
1-7
20-4
23-19
2-12
6-10
20-2
20-8
20-19
B-1
20-3
20-24
®
Integrated Microprocessor User’s Manual, Rev. 3
C
Cache
Cache control register,
Caches
CAM interface,
CCR,
Chip select
Chip selects
Clock generator, USB,
ColdFire
ColdFire core
Condition code register,
Conventions
Core
D
Data
Debug
configuration register,
registers, access control,
coherency and validation,
miss fetch algorithm/line fills,
base registers,
CS0 special case,
option registers,
overview, features, usage,
registers,
general overview,
documentation,
addressing mode summary,
condition code register (CCR),
exception processing overview,
features and enhancements,
instruction set summary,
integer data formats,
programming model,
status register,
supervisor programming model,
user programming mode,
notational,
terminology,
version 2
bus,
attribute trigger register,
BDM command set summary,
overview,
2-6
20-2
8-2
1-xliv
1-4
1-xlvii
11-6
8-3
2-8
1-xliii
8-5
8-2
1-5
4-12
12-4
2-9
2-4
2-6
2-9
2-9
5-7
2-13
2-4
4-8
8-1
2-12
2-1
4-10
5-19
2-6
2-25
2-7
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