MCF5272CVF66J Freescale Semiconductor, MCF5272CVF66J Datasheet - Page 155

• Manufacturer Part Number: MCF5272CVF66J
• Description: IC MCU 166MHZ 196MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVF66J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Leaded Process Compatible: No
• Rohs Compliant: No
• Peak Reflow Compatible (260 C): No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: No

Freescale Semiconductor
Instruction
bcc.{b,w}
bra.{b,w}
bsr.{b,w}
addq.l
divs.w
divu.w
addx.l
cmpi.l
link.w
addi.l
andi.l
cmp.l
divu.l
extb.l
divs.l
ext.w
add.l
add.l
and.l
and.l
bchg
bchg
eori.l
clr.w
asr.l
bset
bset
clr.b
eor.l
ext.l
asl.l
bclr
bclr
btst
btst
jmp
clr.l
lea
jsr
Operand Syntax
{Dy,#imm},Dx
{Dy,#imm},Dx
#imm,<ea>x
#imm,<ea>x
#imm,<ea>x
#imm,<ea>x
#imm,<ea>x
Table 5-22. PST/DDATA Specification for User-Mode Instructions
<ea>y,Rx
Dy,<ea>x
<ea>y,Dx
Dy,<ea>x
Dy,<ea>x
Dy,<ea>x
Dy,<ea>x
Dy,<ea>x
<ea>y,Rx
<ea>y,Dx
<ea>y,Dx
<ea>y,Dx
<ea>y,Dx
Dy,<ea>x
<ea>y,Ax
#imm,Dx
#imm,Dx
#imm,Dx
#imm,Dx
Ay,#imm
MCF5272 ColdFire
<ea>x
<ea>x
<ea>x
<ea>x
<ea>x
Dy,Dx
Dx
Dx
Dx
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1
PST = 0x1
if taken, then PST = 0x5, else PST = 0x1
PST = 0x1, {PST = 0x8, DD = source}, {PST = 0x8, DD = destination}
PST = 0x1, {PST = 0x8, DD = source}, {PST = 0x8, DD = destination}
PST = 0x5
PST = 0x1, {PST = 0x8, DD = source}, {PST = 0x8, DD = destination}
PST = 0x5, {PST = 0xB, DD = destination operand}
PST = 0x1, {PST = 0x8, DD = source operand}
PST = 0x1, {PST = 0x8, DD = source operand}
PST = 0x1, {PST = 0x8, DD = destination operand}
PST = 0x1, {PST = 0xB, DD = destination operand}
PST = 0x1, {PST = 0x9, DD = destination operand}
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1, {PST = 0x9, DD = source operand}
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x5, {PST = [0x9AB], DD = target address}
PST = 0x5, {PST = [0x9AB], DD = target address},
PST = 0x1
PST = 0x1, {PST = 0xB, DD = destination operand}
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0x8, DD = source}, {PST = 0x8, DD = destination}
PST = 0x1, {PST = 0x8, DD = source}, {PST = 0x8, DD = destination}
PST = 0x1, {PST = 0x8, DD = source}, {PST = 0x8, DD = destination}
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1, {PST = 0x9, DD = source operand}
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
{PST = 0xB , DD = destination operand}
®
Integrated Microprocessor User’s Manual, Rev. 3
PST/DDATA
1
1
Debug Support
5-37