MCF5272CVF66J Freescale Semiconductor, MCF5272CVF66J Datasheet - Page 136
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MCF5272CVF66J
Manufacturer Part Number
MCF5272CVF66J
Description
IC MCU 166MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Leaded Process Compatible
No
Rohs Compliant
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5272CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Debug Support
5.5.2.1
The basic receive packet,
Table 5-15
5.5.2.2
The basic transmit packet,
Table 5-16
5-18
15–0
15–0
Bits
Bits
16
16
16
S
16
C
Name
Name
Data
Data
C
S
15
describes receive BDM packet fields.
describes transmit BDM packet fields.
15
Receive Packet Format
Transmit Packet Format
Control. This bit is reserved. Command and data transfers initiated by the development system should clear C.
Contains the data to be sent from the development system to the debug module.
Status. Indicates the status of CPU-generated messages listed below. The not-ready response can be ignored
unless a memory-referencing cycle is in progress. Otherwise, the debug module can accept a new serial
transfer after 32 processor clock periods.
S DataMessage
0 xxxxValid data transfer
0 0xFFFFStatus OK
1 0x0000Not ready with response; come again
1 0x0001Error—Terminated bus cycle; data invalid
1 0xFFFFIllegal command
Data. Contains the message to be sent from the debug module to the development system. The response
message is always a single word, with the data field encoded as shown above.
MCF5272 ColdFire
Figure
Figure
Table 5-16. Transmit BDM Packet Field Description
Table 5-15. Receive BDM Packet Field Description
5-13, consists of 16 data bits and 1 status bit.
5-14, consists of 16 data bits and 1 control bit.
Figure 5-14. Transmit BDM Packet
Figure 5-13. Receive BDM Packet
®
Integrated Microprocessor User’s Manual, Rev. 3
Data Field [15:0]
D[15:0]
Description
Description
Freescale Semiconductor
0
0
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