pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 76

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pef2256e

Manufacturer Part Number
pef2256e
Description
E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet

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is skipped) or a positive slip (one frame or one half of the current buffer size is read out
twice) is performed at the system interface, depending on the difference between RCLK
and the current working clock of the receive backplane interface. I.e. on the position of
pointer R and W within the memory. A positive/negative slip is indicated in the interrupt
status bits ISR3.RSP and ISR3.RSN.
Figure 22
User’s Manual
Hardware Description
The Receive Elastic Buffer as Circularly Organized Memory
S+, S-
W :
R
:
:
Frame 2 Time Slots
Write Pointer (Route Clock controlled)
Read Pointer (System Clock controlled)
Limits for Slip Detection (mode dependent)
R
S-
76
R’
W
S+
Slip
Frame 1 Time Slots
Moment of Slip Detection
Functional Description E1
ITD10952
DS1.1, 2003-10-23
PEF 2256 H/E
FALC
®
56

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