pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 273

• Manufacturer Part Number: pef2256e
• Description: E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
• Manufacturer: Infineon Technologies Corporation

Global Configuration Register (Read/Write)
Value after reset: 00
GCR
VIS
SCI
SES
ECMC
PD
User’s Manual
Hardware Description
VIS
7
Masked Interrupts Visible
0 =
1 =
Status Change Interrupt
0 =
1 =
Select External Second Timer
0 =
1 =
Error Counter Mode COFA
0 =
1 =
Power Down
Switches between power-up and power-down mode.
0 =
1 =
SCI
Masked interrupt status bits are not visible in registers ISR(5:0).
The following interrupts are activated both on activation and
deactivation of the internal interrupt source:
ISR2.LOS, ISR2.AIS, ISR3.LMFA16
Internal second timer selected
counter CEC3L/H.
A Change of Frame or Multiframe Alignment COFA is detected
since the last resynchronization. The events are accumulated
in the error counter CEC3L.(1:0).
Multiframe periods received in the asynchronous state are
accumulated in the error counter CEC3L.7-2.
An overflow of each counter is disabled.
Power up
Power down
All outputs are driven inactive; multifunction ports are driven
high by the weak internal pullup device.
Masked interrupt status bits are visible in ISR(5:0), but they are
not visible in register GIS.
Interrupts are generated either on activation or deactivation of
the internal interrupt source.
External second timer selected
The S
SES
a
6-bit error indications are accumulated in the error
ECMC
273
DS1.1, 2003-10-23
PEF 2256 H/E
PD
E1 Registers
0
FALC
(46)
®
56