pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 235

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pef2256e

Manufacturer Part Number
pef2256e
Description
E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet

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Receive Time Slot Register 1 to 4 (Read/Write)
Value after reset: 00
RTR1
RTR2
RTR3
RTR4
TS(31:0)
User’s Manual
Hardware Description
TS16
TS24
TS0
TS8
7
Time Slot
These bits define the received time slots on the system highway port
RDO to be extracted to RFIFO and marked. Additionally these
registers control the RSIGM marker which can be forced high during
the corresponding time slots independently of bit CCR1.EITS.
A one in the RTR(4:1) bits samples the corresponding time slots and
send their data to the RFIFO of the signaling controller if bit
CCR1.EITS is set.
Assignments:
TS0 → Time slot 0
...
TS31 → Time slot 31
1 =
TS17
TS25
TS1
TS9
H
, 00
0 =The corresponding time slot is not extracted and stored into
the RFIFO.
The contents of the selected time slot is stored in the RFIFO.
Although the idle time slots can be selected. This function is
activated, if bit CCR1.EITS is set.
The corresponding time slot is forced high on marker pin
RSIGM.
H
, 00
TS10
TS18
TS26
TS2
H
, 00
H
TS11
TS19
TS27
TS3
235
TS12
TS20
TS28
TS4
TS13
TS21
TS29
TS5
TS14
TS22
TS30
TS6
DS1.1, 2003-10-23
PEF 2256 H/E
TS15
TS23
TS31
TS7
E1 Registers
0
FALC
(0C)
(0D)
(0E)
(0F)
®
56

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