pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 442

• Manufacturer Part Number: pef2256e
• Description: E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
• Manufacturer: Infineon Technologies Corporation

BOM
Receive Signaling Status Register (Read)
RSIS relates to the last received HDLC or BOM frame; it is copied into RFIFO when
end-of-frame is recognized (last byte of each stored frame).
VFR
RDO
CRC16
User’s Manual
Hardware Description
Bit Oriented Message - HDLC Channel 1
Significant only in ESF frame format and auto switching mode is
enabled.
0 =
1 =
Valid Frame - HDLC Channel 1
Determines whether a valid frame has been received.
1 =
0 =
An invalid frame is either
– a frame which is not an integer number of 8 bits (n× 8 bits) in length
– a frame which is too short taking into account the operation mode
Note:Shorter frames are not reported.
Receive Data Overflow - HDLC Channel 1
A data overflow has occurred during reception of the frame.
Additionally, an interrupt can be generated
(refer to ISR1.RDO/IMR1.RDO).
CRC16 Compare/Check - HDLC Channel 1
0 =
1 =
(e.g. 25 bits), or
selected by MODE (MDS(2:0)) and the selection of receive CRC
on/off (CCR2.RCRC) as follows:
• MDS(2:0) = 011 (16 bit Address),
• MDS(2:0) = 010 (8 bit Address),
RCRC = 0: 4 bytes; RCRC = 1: 3 or 4 bytes
RCRC = 0: 3 bytes; RCRC = 1: 2 or 3 bytes
HDLC mode
BOM mode
CRC check failed; received frame contains errors.
CRC check o.k.; received frame is error-free.
Valid
Invalid
442
DS1.1, 2003-10-23
T1/J1 Registers
PEF 2256 H/E
FALC
®
56