pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 440

• Manufacturer Part Number: pef2256e
• Description: E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
• Manufacturer: Infineon Technologies Corporation

Receive DL-Bit Register 3 (Read)
RDL3(7:0)
Receive Signaling Pointer 1 (Read)
Value after reset: 00
RS(8:1)C
Receive Signaling Pointer 2 (Read)
Value after reset: 00
RS(12:0)C
User’s Manual
Hardware Description
Receive DL-Bit
Only valid if F72 format is enabled.
The received DL-Bits are shifted into this register. RDL30 is received
in frame 58 and RDL37 in frame 72, if F72 format is enabled.
This register is updated with every receive multiframe begin interrupt
ISR0.RMB.
Receive Signaling Register RS(8:1) Changed
A one in each bit position indicates that the received signaling data in
the corresponding RS(8:1) registers are updated. Bit RS1C is the
pointer for register RS1, while RS8C points to RS8.
Receive Signaling Register RS(12:9) Changed
A one in each bit position indicates that the received signaling data in
the corresponding RS(12:9) registers are updated. Bit RS9C is the
pointer for register RS9, while RS12C points to RS12
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DS1.1, 2003-10-23
T1/J1 Registers
PEF 2256 H/E
FALC
®
56