pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 321

• Manufacturer Part Number: pef2256e
• Description: E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
• Manufacturer: Infineon Technologies Corporation

Receive Signaling Status Register (Read)
RSIS
RSIS relates to the last received HDLC frame; it is copied into RFIFO when end-of-frame
is recognized (last byte of each stored frame).
VFR
RDO
CRC16
RAB
User’s Manual
Hardware Description
VFR
7
Valid Frame - HDLC Channel 1
Determines whether a valid frame has been received.
1 =
0 =
An invalid frame is either
– a frame which is not an integer number of 8 bits (n× 8 bits) in length
– a frame which is too short taking into account the operation mode
Receive Data Overflow - HDLC Channel 1
A RFIFO data overflow has occurred during reception of the frame.
Additionally,
ISR1.RDO/IMR1.RDO).
CRC16 Compare/Check - HDLC Channel 1
0 =
1 =
Receive Message Aborted - HDLC Channel 1
This bit is set in SS7 mode, if the maximum number of octets (272+7)
is exceeded. The received frame was aborted from the transmitting
station. According to the HDLC protocol, this frame must be discarded
by the receiver station.
Note:Shorter frames are not reported.
RDO
(e.g. 25 bits), or
selected by MODE (MDS(2:0)) and the selection of receive CRC
on/off (CCR2.RCRC) as follows:
• MDS(2:0) = 011 (16 bit Address),
• MDS(2:0) = 010 (8 bit Address),
RCRC = 0: 4 bytes; RCRC = 1: 3 or 4 bytes
RCRC = 0: 3 bytes; RCRC = 1: 2 or 3 bytes
Valid
Invalid
CRC check failed; received frame contains errors.
CRC check o.k.; received frame is error-free.
CRC16
an
RAB
interrupt
321
HA1
can
HA0
be
generated
DS1.1, 2003-10-23
PEF 2256 H/E
LA
E1 Registers
0
FALC
(refer
(65)
®
56
to