pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 42

• Manufacturer Part Number: pef2256e
• Description: E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
• Manufacturer: Infineon Technologies Corporation

Table 4
Pin or
Ball No.
67 (D6)
68 (A6)
69 (B5)
70 (D5)
56 (D8)
64 (C6)
User’s Manual
Hardware Description
Name
RPA
RPB
RBC
RPD
XDI
SCLKX
Pin Definitions - System Interface (cont’d)
Pin
Type
O
I
O
O
I
I
Buffer
Type
PU
PU
Function
Loss of Signal Indication (LOS)
PC(1:4).RPC(3:0) = 1100
The output signal reflects the Loss of Signal
status ss readable in FRS0.LOS
General Purpose Input (GPI)
PC(1:4).RPC(3:0) = 1001
The digital signal level applied externally can
be read through a status register.
For unused RPAx pins this configuration is
recommended.
General Purpose Output High (GPOH)
PC(1:4).RPC(3:0) = 1010
A fixed high output level is driven.
General Purpose Output Low (GPOL)
PC(1:4).RPC(3:0) = 1011
A fixed low output level is driven.
Transmit Data Input
Transmit data received from the system
highway. Latching of data is done with rising
or falling transitions of SCLKX according to bit
SIC3.RESX. The delay between the
beginning of time slot 0 and the initial edge of
SCLKX (after SYPX goes active) is
determined by the registers XC(1:0). At
higher data rates (> 1.544/2.048 Mbit/s)
sampling of data is defined by bits
SIC2.SICS(2:0).
Transmit System Clock
Working clock for the transmit system
interface with a frequency of
16.384/8.192/4.096/2.048 in E1 mode and
16.384/8.192/4.096/2.048 MHz
(SIC2.SSC2 = 0) or
12.352/6.176/3.088/1.544 MHz
(SIC2.SSC2 = 1) in T1/J1 mode.
42
B
B
B
B
External Signals
DS1.1, 2003-10-23
PEF 2256 H/E
FALC
®
56