PEB20571FV31XP Infineon Technologies, PEB20571FV31XP Datasheet - Page 99

• Manufacturer Part Number: PEB20571FV31XP
• Manufacturer: Infineon Technologies

Specifications of PEB20571FV31XP

• Lead Free Status / Rohs Status: Compliant

4.2.7.5
B-channel data on all U
continuous power density spectrum on the line.
Scrambling is done according to ITU-T V.27 with the generator polynomial 1 + x
OCTAT-P and DASL.
Initialization via History RAM (HRAM)
The scrambler is activated/deactivated for each U
to the history RAM address.
During initialization the DSP writes a value with '0' in its LSB (other bits are of no
importance) to every History RAM address associated to an U
be scrambled, and a value with '1' in its LSB for every U
scrambled. The same values must be written to the descrambler history RAM.
The HRAM addresses are:
• 0x9000 - 0x9017 (scrambler U
• 0x9020 - 0x9037 (descrambler U
For example, in order to activate scrambling and descrambling for channel number 3, the
DSP must execute two write operations as follows:
• Write "xxxxxxxxxxxxxxx1" to address 0x9002
• Write "xxxxxxxxxxxxxxx1" to address 0x9022
These writes are executed only when the scrambler is in idle mode, i.e. value 0x0003
was written by the OAK to address 0xD010.
Note: The HRAM setting is handled by the DSP according to the scrambler mode
4.2.8
For DECT systems the DELIC supports synchronization of the different radio base
stations (RBS). Synchronization is controlled by the DSP via the T-bit in the U
Data Sheet
register (address 0xD010).
U
DECT Synchronization for U
PN
Scrambler/Descrambler
PN
channels of the IOM-2000 interface is scrambled to give a flat
PN
PN
channel 0..23)
channel 0..23)
82
PN
- Interface
PN
channel separately by a DSP write
PN
Functional Description
PN
channel that must be
channel that is not to
PEB 20570
PEB 20571
2003-07-31
PN
-frame.
6
+ x
7
,