PEB20571FV31XP Infineon Technologies, PEB20571FV31XP Datasheet - Page 147

• Manufacturer Part Number: PEB20571FV31XP
• Manufacturer: Infineon Technologies

Specifications of PEB20571FV31XP

• Lead Free Status / Rohs Status: Compliant

The program code is now transferred in pieces of maximum 15 words by use of the
"Write Program Memory Command".
MDT0 = 0xDESTINATION_ADDRESS
MDTn = 0xOPCODE_WORDn
MCMD = 0xAn[n=1..15 number of code words to write to address++]
Before writing this command, the µP must check that the mailbox is free. This is done by
reading the MBUSY bit (bit 7 of address 0x41). The µP must wait until this bit is reset
before sending the next command.
Missing addresses in the HEX file must not be loaded. The "Write Program Memory
Command" must be repeated until the program code is fully loaded. The end of the code
segment inside the HEX file is the change from C: (code) to D: (data). This is the start of
the data segment, which is needed for the Data Boot, described in the next step.
After all the code has been loaded, the "Finish Boot" command must be sent:
MCMD = 0x1F
4.8.7
The reset is executed via low signals on the DELIC RESET pin (29) and the VIP RESET
pin (44). It is recommended to connect the VIP RESET inputs to the DELIC RESIND
output pin (89). The RESIND signal is a delayed reset signal and stays at least 500 us
after termination of the DELIC RESET input. This mechanism ensures that all output
clocks of the DELIC have become stable even after a short reset was applied.
Connecting the VIP reset to this RESIND signal ensures stable VIP clocking after reset
(Layer1 clock, DCL2000, FSC).
Together with applying the reset signal to the DELIC, the strap pin signals must be
defined. There are 9 pins at the DELIC device which have a special functionality. These
so called strap pins are used as inputs while reset is active and determine different
modes like master/slave mode of the PCM interface, test modes, boot mode,... Please
refer to
The settings of the strap signals are sampled with the rising edge of the DELIC RESET
input signal. For a µP- boot, the default settings of strap 4 (emulation boot) and strap 6
(boot strap) are needed.
After a correct reset execution and strap pin setting, the DELIC sends the command
"Start Loading Program RAM" to the uP: OCMD = 0x1F
Data Sheet
page 38
Reset Execution and Boot Strap Pin Setting
for detailed information about the strap pin options.
130
Functional Description
PEB 20570
PEB 20571
2003-07-31