PEB20571FV31XP Infineon Technologies, PEB20571FV31XP Datasheet - Page 109

• Manufacturer Part Number: PEB20571FV31XP
• Manufacturer: Infineon Technologies

Specifications of PEB20571FV31XP

• Lead Free Status / Rohs Status: Compliant

Table 29
Frame number
1
2
6
7
11
12
16
17
...
Note: 1.Only frame positions (within the 20-frame multiframe) that carry S- or Q-channel
On the IOM-2000 interface, the S/T multiframe information is included in the DX/DR data
stream (transparent to the VIP). The values of the multiframe are controlled by the DSP
software in the DELIC.
When multiframe synchronization is not achieved or lost, the VIP mirrors the received F
bits. Once the multiframe synchronization is established, the DSP sends the multiframe
synchronization command to the VIP (MSYNC bit). Upon reception of the MSYNC, the
VIP stops mirroring the F
4.2.10.3 F
In the transmit direction the F
opposite of the F
to ‘1’, which indicates the Q-bit position to the TE.
The receive direction, the F
Data Sheet
information are shown here
2.The Q- and S-bits, which are not used, are set to ‘1’.
a
/N Bit
S/T Mode Multiframe Bit Positions
a
. The F
LT-S to TE or
CO to LT-T,
F
1
0
1
0
1
0
1
0
...
a
bit position
a
a
-bit.
bit is equal to binary ‘0’, except every 5
a
bit positions represent the Q-channel.
a
/N bit pair is coded in such a way that N is the binary
LT-S to TE or
CO to LT-T,
M-bit
1
0
0
0
0
0
0
0
...
92
LT-S to TE or
CO to LT-T,
S-bit
S11
S21
S12
S22
...
S13
S23
S14
S24
Functional Description
th
frame when it is set
TE to LT-S or
LT-T to CO
F
Q1
0
Q2
0
Q3
0
Q4
0
...
a
bit position
PEB 20570
PEB 20571
2003-07-31
a