PEB20571FV31XP Infineon Technologies, PEB20571FV31XP Datasheet - Page 42

• Manufacturer Part Number: PEB20571FV31XP
• Manufacturer: Infineon Technologies

Specifications of PEB20571FV31XP

• Lead Free Status / Rohs Status: Compliant

Table 10
Pin
No.
39
40
43
44
41
42
45
Data Sheet
Symbol
FSC
DCL
DD0
DD1
DU0
DU1
DRDY
IOM
In (I)
Out(O)
O
O
O(OD) High Z
O(OD) High Z
I
I
I
®
-2 Interface Pins (DELIC-PB)
O
During
Reset
TEST-
Strap (3),
(pull-up),
refer to
Table 19
I
I
I
After
Reset
O
O
High Z Data Downstream IOM-2 Interface
High Z Data Downstream IOM-2 Interface
I
I
I
25
Function
Frame Synchronization Clock (8 kHz)
Used for both the IOM-2 and the IOM-
2000 interface
IOM-2 Data Clock 2.048 MHz or 4.096
MHz
Channel0
Channel1
Data Upstream IOM-2 Interface
Channel 0
Data Upstream IOM-2 Interface
Channel 1
D- Channel Ready
Stop/Go information for D-channel
control on S/T interface in LT-T.
Affects only IOM-2 port 0.
DRDY = 1 means GO
DRDY = 0 means STOP
If DRDY is not used, this pin has to be
connected to ’High’ level
Pin Description
PEB 20570
PEB 20571
2003-07-31