PEB20571FV31XP Infineon Technologies, PEB20571FV31XP Datasheet - Page 61

no-image

PEB20571FV31XP

Manufacturer Part Number
PEB20571FV31XP
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB20571FV31XP

Lead Free Status / Rohs Status
Compliant
Figure 13
Receive Data Channel Shift
In receive direction (DR), data of all IOM-2000 channels (ch0...7 if one VIP is used,
ch0 ... ch23 if three VIPs are used) is shifted by 2 channels with respect to the
transmitted data channels (DX), assuming a start of transmission of ch0 bit0 with the
FSC signal. DELIC is transmitting ch0, while receiving ch2 via DR the same time, etc.
Data Sheet
(example for 24 channels in U
DX
DR
DX/DR
FSC
DCL
ch0
ch2
F-bit
IOM-2000 Data Order (3 VIPs with 24 Channels)
Ch0 bit0
ch1
ch3
Ch23 bit0
Ch24 bit0
PN
mode)
Ch31 bit0
ch2
ch4
Ch0 bit1
Ch23 bit1
Ch24 bit1
ch3
ch5
12.288 MHz
not used (don’t care)
125 µs
Ch31 bit1
44
ch4
ch6
not used (don’t care)
Ch0 bit37
ch5
ch7
Ch23 bit37
Ch24 bit37
ch6
ch0
Ch31 bit37
Interface Description
ch7
ch1
PEB 20570
PEB 20571
not used
2003-07-31
ch0
ch2

Related parts for PEB20571FV31XP