PEB20571FV31XP Infineon Technologies, PEB20571FV31XP Datasheet - Page 276

• Manufacturer Part Number: PEB20571FV31XP
• Manufacturer: Infineon Technologies

Specifications of PEB20571FV31XP

• Lead Free Status / Rohs Status: Compliant

Timing for Multiplexed Bus
In this mode ALE pin is used in order to lock the address, driven over the multiplexed
A/D bus.
Table 71
Parameter
A-bus setup time before ALE falling
edge
A-bus hold time after ALE falling edge t
ALE pulse width
CS setup time before WR rising edge t
CS hold time after WR rising edge
D-bus setup time before WR rising
edge
D-bus hold time after WR rising edge t
ALE hold time after WR rising edge
WR pulse width
Figure 67
Data Sheet
WR
CS
AD
ALE
Timing for Write Cycle in Intel/Infineon Multiplexed Mode
Write Cycle Intel/Infineon Multiplexed Mode
t
SAL
t
WL
Address
t
HAL
Electrical Characteristics and Timing Diagrams
Symbol
t
t
t
t
t
t
SAL
HAL
WL
SCW
HCW
SDW
HDW
HLW
WW
259
t
t
SDW
SCW
t
WW
min.
12
5
7
14
5
6
8
5
7
Limit Values
Data
max.
t
HLW
t
t
HCW
HDW
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Output load
capacity of
50 pF
PEB 20570
PEB 20571
2003-07-31