PEB20571FV31XP Infineon Technologies, PEB20571FV31XP Datasheet - Page 196

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PEB20571FV31XP

Manufacturer Part Number
PEB20571FV31XP
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB20571FV31XP

Lead Free Status / Rohs Status
Compliant
6.2.2.3
ITSCR Register
Reset Value: 00
TS(15:0)
Data Sheet
15
7
IOMU Tri-State Control Register
Every bit determines whether DD0/1 output is in tri-state during the time slot
sequence. The time slot sequence length, indices and port controlled by
each TS-bit is defined according the IOMU data rate mode (ICR.DR(1:0))
0 =
1 =
H
14
6
DD0/1 is in tri-state during the related time slot sequence
DD0/1 is driven by the IOMU during the related time slot sequence
13
5
12
4
read/write
TS(15:8)
179
TS(7:0)
11
3
10
2
Register Description
Address:
Set Address:
D042
Reset Address:
D043
Read Address:
D044
9
1
PEB 20570
PEB 20571
H
H
H
2003-07-31
8
0

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