PEB20571FV31XP Infineon Technologies, PEB20571FV31XP Datasheet - Page 297

• Manufacturer Part Number: PEB20571FV31XP
• Manufacturer: Infineon Technologies

Specifications of PEB20571FV31XP

• Lead Free Status / Rohs Status: Compliant

Figure 89
Table 90
Parameter
XCLK Period
XCLK Minimum High
Period
XCLK Minimum Low
Period
1)
Figure 90
Data Sheet
L1_CLK
XCLK is always an input. The frequencies, which are specified in the table above, should be provided by the
user. When XCLK is used as a reference clock for the internal DCXO-PLL, one of these specified frequencies
must be used, to guarantee proper work of the DELIC.
XCLK
1)
L1_CLK Timing
XCLK Timing
XCLK Timing
Symbol
t
t
t
XLP
XLH
XLL
min.
50
50
Electrical Characteristics and Timing Diagrams
Limit Values
280
typ.
488
651
125
t
LCP
t
XLH
max.
t
XLP
Unit Notes
ns
ns
ns
ns
s
t
XLL
XCLK = 2.048 MHz
XCLK = 1.536 MHz
XCLK = 8 kHz
PEB 20570
PEB 20571
2003-07-31