PEB20571FV31XP Infineon Technologies, PEB20571FV31XP Datasheet - Page 184

• Manufacturer Part Number: PEB20571FV31XP
• Manufacturer: Infineon Technologies

Specifications of PEB20571FV31XP

• Lead Free Status / Rohs Status: Compliant

6.2.1.4
The VIPSTR0-2 registers contain the status bits received from the dedicated VIP for
VIPs 0, 1, 2 respectively (all three registers have the same structure).
VIPSTR Register
VIPSTR0: D0AC
Reset value: 0000
DELAY(7:0)
VIPVNR(1..0) VIP Version Number
Note: Unused bits (x) read as ‘0’.
Data Sheet
15
x
7
VIP Status Registers
Line Delay Value (U
Returns the value of the measured line delay (in µs) between the U
transmit and receive frame with a resolution of 65 ns or 130 ns
(programmable in VIPCMR.DELRE bits).
The value indicates the delay between the transmitted M-bit and the
received LF-bit (minus the U
direction equals to the measured delay divided by two.
The channel address for the delay measurement is coded in
VIPCMR.DELCH(2:0) bits.
The VIP provides 2 values in one U
which the bigger one is the valid.
Note: The transceiver delays of the VIP are included in the delay
0 =
1 =
H
,
H
14
x
6
measurement.
VIP version V1.1
VIP version V2.1
13
5
x
PN
)
12
DELAY(7:0)
4
x
read
167
PN
guard time of 2 bits). The delay for one
11
x
3
PN
frame (one every 125 µs) from
VIPVNR(1..0)
10
2
Register Description
Address:
VIPSTR1:
D0AD
VIPSTR2: D0AE
9
1
PEB 20570
PEB 20571
H
,
2003-07-31
8
0
x
PN
H