PEB20571FV31XP Infineon Technologies, PEB20571FV31XP Datasheet - Page 59

• Manufacturer Part Number: PEB20571FV31XP
• Manufacturer: Infineon Technologies

Specifications of PEB20571FV31XP

• Lead Free Status / Rohs Status: Compliant

3.2.2
3.2.2.1
On the ISDN line side of the VIP, data is ternary coded. Since the VIP contains logic to
detect the level of the signal, only the data value is transferred via IOM-2000 to DELIC.
U
In U
S/T Mode
In S/T mode, data and control information is sent via IOM-2000 data interface. Every
data bit has a control bit associated with it. Thus, for each S/T line signal, 2 bits are
transferred via DX and DR. Bit0 is assigned to the user data, and bit1 carries control
information.
Table 20
ctrl (bit1) data (bit0) Function
0
0
1
1
Table 21
ctrl (bit1) data (bit0) Function
0
0
1
1
Note: ’data’ is always transmitted prior to ’ctrl’ via DX/DR lines (refer to
Data Sheet
PN
PN
Mode
mode, only data is sent via the IOM-2000 data interface.
IOM-2000 Frame Structure
Data Interface
0
1
0
1
0
1
0
1
Control Bits in S/T Mode on DR Line
Control Bits in S/T Mode on DX Line
Logical ’0’ received on line interface
Logical ’1’ received on line interface
Received E-bit = inverted transmitted D-bit (E=D) (LT-T only)
F-bit (Framing) received; indicates the start of the S frame
Logical ’0’ transmitted on line interface
Logical ’1’ transmitted on line interface
not used
F-bit (Framing) transmitted; indicates the start of the S frame
42
Interface Description
Figure
PEB 20570
PEB 20571
2003-07-31
12).