PEB20571FV31XP Infineon Technologies, PEB20571FV31XP Datasheet - Page 294

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PEB20571FV31XP

Manufacturer Part Number
PEB20571FV31XP
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB20571FV31XP

Lead Free Status / Rohs Status
Compliant
8.6.8
Table 86
Parameter
Test Clock (JTCK) Period
Test Clock (JTCK) Period
Low
Test Clock (JTCK) Period
High
TMS Set-up time before
JTCK Rising Edge
TMS Hold time after JTCK
Rising Edge
TDI Set-up time before
JTCK Rising Edge
TDI Hold time after JTCK
Rising Edge
TDO Delay after JTCK
Falling Edge
Any output pin Delay
after JTCK Falling Edge
Any input pin setup time
before JTCK rising edge
Any input pin hold time
before JTCK rising edge
Data Sheet
JTAG and Emulation Interface Timing
Test Interface Timing
Symbol
t
t
t
t
t
t
t
t
t
t
t
TCJ
CJL
CJH
SUJ
HJR
DSE
DHE
ODF
OPD
IPJ
IAJ
Electrical Characteristics and Timing Diagrams
min.
160
80
80
30
30
30
30
30
30
277
Limit Values
typ.
max.
60
60
Unit Notes
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
In Update-DR TAP
Controller State
In Capture-DR TAP
Controller State
PEB 20570
PEB 20571
2003-07-31

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