st72324bk STMicroelectronics, st72324bk Datasheet - Page 88

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st72324bk

Manufacturer Part Number
st72324bk
Description
3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
Manufacturer
STMicroelectronics
Datasheet

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On-chip peripherals
9.4
9.4.1
9.4.2
Note:
9.4.3
88/167
Serial peripheral interface (SPI)
Introduction
The serial peripheral interface (SPI) allows full-duplex, synchronous, serial communication
with external devices. An SPI system may consist of a master and one or more slaves
however the SPI interface can not be a master in a multimaster system.
Main features
In slave mode, continuous transmission is not possible at maximum frequency due to the
software overhead for clearing status flags and to initiate the next transmission sequence.
General description
Figure 44
The SPI is connected to external devices through 4 pins:
Full duplex synchronous transfers (on 3 lines)
Simplex synchronous transfers (on 2 lines)
Master or slave operation
Six master mode frequencies (f
f
SS Management by software or hardware
Programmable clock polarity and phase
End of transfer interrupt flag
Write collision, Master Mode Fault and Overrun flags
CPU
/2 max. slave mode frequency (see note)
SPI Control Register (SPICR)
SPI Control/Status Register (SPICSR)
SPI Data Register (SPIDR)
MISO: Master In / Slave Out data
MOSI: Master Out / Slave In data
SCK: Serial Clock out by SPI masters and input by SPI slaves
shows the serial peripheral interface (SPI) block diagram. There are 3 registers:
CPU
/4 max.)
ST72323 ST72323L

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