st72324bk STMicroelectronics, st72324bk Datasheet - Page 111
st72324bk
Manufacturer Part Number
st72324bk
Description
3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
Manufacturer
STMicroelectronics
Datasheet
1.ST72324BK.pdf
(167 pages)
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ST72323 ST72323L
Table 58.
Using a prebyte
The instructions are described with one to four opcodes.
In order to extend the number of available opcodes for an 8-bit CPU (256 opcodes), three
different prebyte opcodes are defined. These prebytes modify the meaning of the instruction
they precede.
The whole instruction becomes:
These prebytes enable instruction in Y as well as indirect addressing modes to be
implemented. They precede the opcode of the instruction in X or the instruction using direct
addressing mode. The prebytes are:
Table 59.
Logical operations
Bit Operation
Conditional Bit Test and Branch
Arithmetic operations
Shift and Rotates
Unconditional Jump or Call
Conditional Branch
Interruption management
Condition Code Flag modification
ADC
ADD
AND
BCP
Mnemo
PC-2 End of previous instruction
PC-1 Prebyte
PC
PC+1 Additional word (0 to 2) according to the number of bytes required to compute
PDY 90 Replace an X based instruction using immediate, direct, indexed, or inherent
PIX 92 Replace an instruction using direct, direct bit, or direct relative addressing
PIY 91 Replace an instruction using X indirect indexed addressing mode by a Y one.
Add with Carry
Addition
Logical And
Bit compare A, Memory tst (A . M)
opcode
the effective address
Instruction groups (continued)
Instruction set overview
addressing mode by a Y one.
mode to an instruction using the corresponding indirect addressing mode.
It also changes an instruction using X indexed addressing mode to an
instruction using indirect X indexed addressing mode.
Group
Description
A = A + M + C
A = A + M
A = A . M
Function/example
ADC
SLL
JRA
AND
BSET
BTJT
JRxx
TRAP
SIM
OR
BRES
BTJF
ADD
SRL
JRT
WFI
RIM
XOR
SUB
SRA
JRF
Halt
SCF
A
A
A
A
Dst
CPL
SBC
RLC
JP
IRET
RCF
Instruction
M
M
M
M
Src
NEG
MUL
RRC
CALL CALLR
I1
SWAP
H
H
H
Instruction set
I0
SLA
NOP RET
N
N
N
N
N
111/167
Z
Z
Z
Z
Z
C
C
C
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