st72324bk STMicroelectronics, st72324bk Datasheet - Page 82

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st72324bk

Manufacturer Part Number
st72324bk
Description
3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
Manufacturer
STMicroelectronics
Datasheet

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On-chip peripherals
82/167
Bit 0 = OLVL1 Output Level 1.
Control register 2 (CR2)
Reset Value: 0000 0000 (00h)
Bit 7 = OC1E Output Compare 1 Pin Enable.
Bit 6 = OC2E Output Compare 2 Pin Enable.
Bit 5 = OPM One Pulse Mode.
Bit 4 = PWM Pulse Width Modulation.
Bits 3, 2 = CC[1:0] Clock Control.
Table 42.
1. If the external clock pin is not available, programming the external clock configuration stops the counter.
OC1E
The OLVL1 bit is copied to the OCMP1 pin whenever a successful comparison occurs
with the OC1R register and the OC1E bit is set in the CR2 register.
This bit is used only to output the signal from the timer on the OCMP1 pin (OLV1 in
Output Compare mode, both OLV1 and OLV2 in PWM and one-pulse mode). Whatever
the value of the OC1E bit, the Output Compare 1 function of the timer remains active.
0: OCMP1 pin alternate function disabled (I/O pin free for general-purpose I/O).
1: OCMP1 pin alternate function enabled.
This bit is used only to output the signal from the timer on the OCMP2 pin (OLV2 in
Output Compare mode). Whatever the value of the OC2E bit, the Output Compare 2
function of the timer remains active.
0: OCMP2 pin alternate function disabled (I/O pin free for general-purpose I/O).
1: OCMP2 pin alternate function enabled.
0: One Pulse Mode is not active.
1: One Pulse Mode is active, the ICAP1 pin can be used to trigger one pulse on the
OCMP1 pin; the active transition is given by the IEDG1 bit. The length of the generated
pulse depends on the contents of the OC1R register.
0: PWM mode is not active.
1: PWM mode is active, the OCMP1 pin outputs a programmable cyclic signal; the
length of the pulse depends on the value of OC1R register; the period depends on the
value of OC2R register.
The timer clock mode depends on these bits as shown in
7
External clock (when available)
Clock control bits
OC2E
Timer clock
f
f
f
CPU
CPU
CPU
/ 4
/ 2
/ 8
OPM
(1)
PWM
Read/Write
CC1
CC1
CC0
0
0
1
1
Table
IEDG2
42:
ST72323 ST72323L
CC0
0
1
0
1
EXEDG
0

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