st72324bk STMicroelectronics, st72324bk Datasheet - Page 31

• Manufacturer Part Number: st72324bk
• Description: 3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
• Manufacturer: STMicroelectronics

ST72323 ST72323L
Note:
1
2
Figure 14. Priority decision process
When an interrupt request is not serviced immediately, it is latched and then processed
when its software priority combined with the hardware priority becomes the highest one.
The hardware priority is exclusive while the software one is not. This allows the previous
process to succeed with only one interrupt.
RESET and TRAP can be considered as having the highest software priority in the decision
process.
Different interrupt vector sources
Two interrupt source types are managed by the ST7 interrupt controller: the non-maskable
type (RESET, TRAP) and the maskable type (external or from internal peripherals).
Nonmaskable sources
These sources are processed regardless of the state of the I1 and I0 bits of the CC register
(see
corresponding vector is loaded in the PC register and the I1 and I0 bits of the CC are set to
disable interrupts (level 3). These sources allow the processor to exit Halt mode.
●
●
TRAP (Non Maskable Software Interrupt)
This software interrupt is serviced when the TRAP instruction is executed. It will be
serviced according to the flowchart in
RESET
The RESET source has the highest priority in the ST7. This means that the first current
routine has the highest software priority (level 3) and the highest hardware priority.
See the
Figure
13). After stacking the PC, X, A and CC registers (except for RESET), the
Section 5.2: Reset sequence manager (RSM)
PRIORITY SERVICED
HIGHEST HARDWARE
Same
INTERRUPTS
SOFTWARE
PRIORITY
PENDING
Figure
PRIORITY SERVICED
HIGHEST SOFTWARE
13.
Different
for more details.
Interrupts
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