st72324bk STMicroelectronics, st72324bk Datasheet - Page 106

• Manufacturer Part Number: st72324bk
• Description: 3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
• Manufacturer: STMicroelectronics

Instruction set
10
10.1
106/167
Instruction set
CPU addressing modes
The CPU features 17 different addressing modes which can be classified into 7 main groups
as shown in
Table 52.
The CPU instruction set is designed to minimize the number of bytes required per
instruction: To do so, most of the addressing modes may be subdivided in two submodes
called long and short:
●
●
The ST7 Assembler optimizes the use of long and short addressing modes.
Table 53.
Addressing mode
Inherent
Immediate
Direct
Indexed
Indirect
Relative
Bit operation
Inherent
Immediate
Short
Long
No Offset
Short
Long
Short
Long
Short
Long
Long addressing mode is more powerful because it can use the full 64 Kbyte address
space, however it uses more bytes and more CPU cycles.
Short addressing mode is less powerful because it can generally only access page
zero (0000h - 00FFh range), but the instruction size is more compact, and faster. All
memory to memory instructions use short addressing modes only (CLR, CPL, NEG,
BSET, BRES, BTJT, BTJF, INC, DEC, RLC, RRC, SLL, SRL, SRA, SWAP)
Mode
Table
Direct
Direct
Direct
Direct
Direct
Indirect
Indirect
Indirect Indexed ld A,([$10],X)
Indirect Indexed ld A,([$10.w],X)
Addressing mode groups
CPU addressing mode overview
52.
Indexed ld A,(X)
Indexed ld A,($10,X)
Indexed ld A,($1000,X)
nop
ld A,#$55
ld A,$10
ld A,$1000
ld A,[$10]
ld A,[$10.w]
Syntax
Example
nop
ld A,#$55
ld A,$55
ld A,($55,X)
ld A,([$55],X)
jrne loop
bset
00..FF
0000..FFFF
00..FF
00..1FE
0000..FFFF
00..FF
0000..FFFF
00..1FE
0000..FFFF
Destination
byte,#5
00..FF
00..FF
00..FF
00..FF
address
Pointer
byte
word
byte
word
ST72323 ST72323L
Pointer
size
+ 0
+ 1
+ 1
+ 2
+ 0
+ 1
+ 2
+ 2
+ 2
+ 2
+ 2
Length
(bytes)