st72324bk STMicroelectronics, st72324bk Datasheet - Page 137

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st72324bk

Manufacturer Part Number
st72324bk
Description
3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
Manufacturer
STMicroelectronics
Datasheet

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ST72323 ST72323L
11.9.2
Figure 80. RESET pin protection
1. The reset network protects the device against parasitic resets.
2. The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad.
3. Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin
4. Because the reset circuit is designed to allow the internal RESET to be output in the RESET pin, the user
ICCSEL pin
Subject to general operating conditions for V
Table 81.
1. Data based on design simulation and/or technology characteristics, not tested in production.
Symbol
Otherwise the device can be damaged when the ST7 generates an internal reset (watchdog).
can go below the V
account internally.
must ensure that the current sunk on the RESET pin (by an external pull-up or external reset circuit for
example) is less than the absolute maximum value specified for I
116.
external
V
V
circuit
I
User
reset
L
IH
IL
Input low level voltage
Input high level voltage
Input leakage current
CCSEL pin characteristics
IL
max. level specified in
Parameter
0.01 µF
V
DD
(1)
4.7 kΩ
(1)
(1),(2),(3),(4)
Section
V
V
DD
IN
DD
R
= V
11.9.1. Otherwise the reset will not be taken into
ON
, f
Filter
Conditions
SS
CPU
, and T
INJ(RESET)
A
generator
Pulse
unless otherwise specified.
in
Electrical characteristics
Section Table 61. on page
0.7V
Min
V
SS
DD
0.3V
Max
V
±1
DD
Internal
reset
DD
Watchdog
ST72XXX
137/167
Unit
µA
V

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