st72324bk STMicroelectronics, st72324bk Datasheet - Page 71

• Manufacturer Part Number: st72324bk
• Description: 3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
• Manufacturer: STMicroelectronics

ST72323 ST72323L
Input capture
In this section, the index, i, may be 1 or 2 because there are 2 input capture functions in the
16-bit timer.
The two 16-bit input capture registers (IC1R and IC2R) are used to latch the value of the
free running counter after a transition is detected on the ICAPi pin (see
Table 37.
ICiR register is a read-only register.
The active transition is software programmable through the IEDGi bit of Control Registers
(CRi).
Timing resolution is one count of the free running counter: (
Procedure:
To use the input capture function select the following in the CR2 register:
●
●
And select the following in the CR1 register:
●
●
When an input capture occurs:
●
●
●
Clearing the Input Capture interrupt request (i.e. clearing the ICFi bit) is done in two steps:
1.
2.
Select the timer clock (CC[1:0]) (see
Select the edge of the active transition on the ICAP2 pin with the IEDG2 bit (the ICAP2
pin must be configured as floating input or input with pull-up without interrupt if this
configuration is available).
Set the ICIE bit to generate an interrupt after an input capture coming from either the
ICAP1 pin or the ICAP2 pin
Select the edge of the active transition on the ICAP1 pin with the IEDG1 bit (the
ICAP1pin must be configured as floating input or input with pull-up without interrupt if
this configuration is available).
ICFi bit is set.
The ICiR register contains the value of the free running counter on the active transition
on the ICAPi pin (see
A timer interrupt is generated if the ICIE bit is set and the I bit is cleared in the CC
register. Otherwise, the interrupt remains pending until both conditions become true.
Reading the SR register while the ICFi bit is set.
An access (read or write) to the ICiLR register.
IC1R/IC2R
ICiR
Input capture byte distribution
Figure
36).
MS byte
ICiHR
Table
42).
f
CPU
/
CC[1:0]).
On-chip peripherals
LS byte
Figure
ICiLR
35).
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