st72324bk STMicroelectronics, st72324bk Datasheet - Page 83

• Manufacturer Part Number: st72324bk
• Description: 3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
• Manufacturer: STMicroelectronics

ST72323 ST72323L
Note:
Bit 1 = IEDG2 Input Edge 2.
Bit 0 = EXEDG External Clock Edge.
Control/status register (CSR)
Reset Value: 0000 0000 (00h)
Bit 7 = ICF1 Input Capture Flag 1.
Bit 6 = OCF1 Output Compare Flag 1.
Bit 5 = TOF Timer Overflow Flag.
Reading or writing the ACLR register does not clear TOF.
Bit 4 = ICF2 Input Capture Flag 2.
Bit 3 = OCF2 Output Compare Flag 2.
ICF1
This bit determines which type of level transition on the ICAP2 pin will trigger the
capture.
0: A falling edge triggers the capture.
1: A rising edge triggers the capture.
This bit determines which type of level transition on the external clock pin EXTCLK will
trigger the counter register.
0: A falling edge triggers the counter register.
1: A rising edge triggers the counter register.
0: No input capture (reset value).
1: An input capture has occurred on the ICAP1 pin or the counter has reached the
OC2R value in PWM mode. To clear this bit, first read the SR register, then read or
write the low byte of the IC1R (IC1LR) register.
0: No match (reset value).
1: The content of the free running counter has matched the content of the OC1R
register. To clear this bit, first read the SR register, then read or write the low byte of the
OC1R (OC1LR) register.
0: No timer overflow (reset value).
1: The free running counter rolled over from FFFFh to 0000h. To clear this bit, first read
the SR register, then read or write the low byte of the CR (CLR) register.
0: No input capture (reset value).
1: An input capture has occurred on the ICAP2 pin. To clear this bit, first read the SR
register, then read or write the low byte of the IC2R (IC2LR) register.
0: No match (reset value).
1: The content of the free running counter has matched the content of the OC2R
register. To clear this bit, first read the SR register, then read or write the low byte of the
OC2R (OC2LR) register.
7
OCF1
Read only
TOF
ICF2
OCF2
Read/Write
TIMD
On-chip peripherals
0
reserved
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