st72324bk STMicroelectronics, st72324bk Datasheet - Page 80

• Manufacturer Part Number: st72324bk
• Description: 3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
• Manufacturer: STMicroelectronics

On-chip peripherals
9.3.4
9.3.5
Note:
9.3.6
80/167
Low-power modes
Table 39.
Interrupts
Table 40.
The 16-bit Timer interrupt events are connected to the same interrupt vector (see
Interrupts). These events generate an interrupt if the corresponding Enable Control Bit is set
and the interrupt mask in the CC register is reset (RIM instruction).
Summary of timer modes
Table 41.
1. See note 4 in
2. See note 5 in
3. See note 4 in
Wait
Halt
Input Capture 1 event/Counter reset in PWM mode
Input Capture 2 event
Output Compare 1 event (not available in PWM mode)
Output Compare 2 event (not available in PWM mode)
Timer Overflow event
Input capture (1 and/or 2)
Output compare (1 and/or 2)
One-pulse mode
PWM mode
Mode
No effect on 16-bit Timer.
Timer interrupts cause the device to exit from Wait mode.
16-bit Timer registers are frozen.
In Halt mode, the counter stops counting until Halt mode is exited. Counting resumes from
the previous count when the MCU is woken up by an interrupt with “exit from Halt mode”
capability or from the counter reset value when the MCU is woken up by a Reset.
If an input capture event occurs on the ICAPi pin, the input capture detection circuitry is
armed. Consequently, when the MCU is woken up by an interrupt with “exit from Halt mode”
capability, the ICFi bit is set, and the counter value present when exiting from Halt mode is
captured into the ICiR register.
Modes
Low-power modes
Interrupts
Summary of timer modes
Section : One-pulse
Section : One-pulse
Section : Pulse width modulation
Interrupt event
Input capture 1
mode.
mode.
Yes
Yes
No
No
mode.
Description
Not recommended
Not recommended
Input capture 2
Timer resources
Yes
Yes
Event
OCF1
OCF2
ICF1
ICF2
TOF
flag
(1)
(3)
control
Enable
OCIE
TOIE
ICIE
bit
compare 1
Output
Yes
Yes
No
No
ST72323 ST72323L
from
Wait
Exit
Yes
Yes
Yes
Yes
Yes
Partially
compare 2
Section 6:
Output
Yes
Yes
No
from
Exit
Halt
No
No
No
No
No
(2)