st72324bk STMicroelectronics, st72324bk Datasheet - Page 63

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st72324bk

Manufacturer Part Number
st72324bk
Description
3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
Manufacturer
STMicroelectronics
Datasheet

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ST72323 ST72323L
9.2.7
Note:
Register description
MCC control/status register (MCCSR)
Reset Value: 0000 0000 (00h
Bit 7 = MCO Main clock out selection
To reduce power consumption, the MCO function is not active in Active-Halt mode.
Bit 6:5 = CP[1:0] CPU clock prescaler
Table 33.
Bit 4 = SMS Slow mode select
Bit 3:2 = TB[1:0] Time base control
MCO
This bit enables the MCO alternate function on the PF0 I/O port. It is set and cleared by
software.
0: MCO alternate function disabled (I/O pin free for general-purpose I/O)
1: MCO alternate function enabled (f
These bits select the CPU clock prescaler which is applied in the different slow modes.
Their action is conditioned by the setting of the SMS bit. These two bits are set and
cleared by software.
This bit is set and cleared by software.
0: Normal mode. f
1: Slow mode. f
See
and beeper (MCC/RTC)
These bits select the programmable divider time base. They are set and cleared by
software.
7
Section 7.2: Slow mode
CPU clock prescaler selection
Table 34
CP1
f
CPU
CPU
f
in Slow mode
f
f
f
OSC2
OSC2
OSC2
OSC2
CPU
shows how to select the programmable divider time base.
is given by CP1, CP0
Table 33
CP0
/ 16
=
/ 2
/ 4
/ 8
f
)
for more details.
OSC2
and
shows how to select the CPU clock prescaler.
SMS
Section 9.2: Main clock controller with real-time clock
Read/Write
CPU
on I/O port)
TB1
CP1
0
0
1
1
TB0
On-chip peripherals
OIE
CP0
0
1
0
1
OIF
0
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