st72324bk STMicroelectronics, st72324bk Datasheet - Page 32

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st72324bk

Manufacturer Part Number
st72324bk
Description
3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
Manufacturer
STMicroelectronics
Datasheet

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Interrupts
Note:
32/167
Maskable sources
Maskable interrupt vector sources can be serviced if the corresponding interrupt is enabled
and if its own interrupt software priority (in ISPRx registers) is higher than the one currently
being serviced (I1 and I0 in CC register). If any of these two conditions is false, the interrupt
is latched and thus remains pending.
The clearing sequence resets the internal latch. A pending interrupt (i.e. waiting for being
serviced) will therefore be lost if the clear sequence is executed.
External interrupts
External interrupts allow the processor to exit from Halt low power mode. External
interrupt sensitivity is software selectable through the External Interrupt Control register
(EICR).
External interrupt triggered on edge will be latched and the interrupt request
automatically cleared upon entering the interrupt service routine.
If several input pins of a group connected to the same interrupt line are selected
simultaneously, these will be logically ORed.
Peripheral interrupts
Usually the peripheral interrupts cause the MCU to exit from Halt mode except those
mentioned in the “Interrupt Mapping” table. A peripheral interrupt occurs when a
specific flag is set in the peripheral status registers and if the corresponding enable bit
is set in the peripheral control register.
The general sequence for clearing an interrupt is based on an access to the status
register followed by a read or write to an associated register.
ST72323 ST72323L

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