st72324bk STMicroelectronics, st72324bk Datasheet - Page 23

no-image

st72324bk

Manufacturer Part Number
st72324bk
Description
3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
Manufacturer
STMicroelectronics
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
st72324bk6
Manufacturer:
ST
0
Part Number:
st72324bk6/MFNTR
Manufacturer:
ST
0
Part Number:
st72324bk6TA
Manufacturer:
FREESCALE
Quantity:
201
Part Number:
st72324bk6TA
Manufacturer:
ST
0
ST72323 ST72323L
Bit 2 = N Negative.
Bit 1 = Z Zero.
Bit 0 = C Carry/borrow.
Interrupt management bits
Bits 5 and 3 = I1, I0 Interrupt
Table 3.
Interrupt software priority
Level 0 (main)
Level 1
Level 2
Level 3 (= interrupt disable)
This bit is set and cleared by hardware. It is representative of the result sign of the last
arithmetic, logical or data manipulation. It’s a copy of the result 7
0: The result of the last operation is positive or null.
1: The result of the last operation is negative
(i.e. the most significant bit is a logic 1).
This bit is accessed by the JRMI and JRPL instructions.
This bit is set and cleared by hardware. This bit indicates that the result of the last
arithmetic, logical or data manipulation is zero.
0: The result of the last operation is different from zero.
1: The result of the last operation is zero.
This bit is accessed by the JREQ and JRNE test instructions.
This bit is set and cleared by hardware and software. It indicates an overflow or an
underflow has occurred during the last arithmetic operation.
0: No overflow or underflow has occurred.
1: An overflow or underflow has occurred.
This bit is driven by the SCF and RCF instructions and tested by the JRC and JRNC
instructions. It is also affected by the “bit test and branch”, shift and rotate instructions.
The combination of the I1 and I0 bits gives the current interrupt software priority (see
Table
These two bits are set/cleared by hardware when entering in interrupt. The loaded
value is given by the corresponding bits in the interrupt software priority registers
(IxSPR). They can be also set/cleared by software with the RIM, SIM, IRET, Halt, WFI
and PUSH/POP instructions.
See
Section 6: Interrupts on page 29
3).
Current interrupt software priority
for more details.
Central processing unit
th
I1
1
0
0
1
bit.
I0
0
1
0
1
23/167

Related parts for st72324bk