st72324bk STMicroelectronics, st72324bk Datasheet - Page 78

no-image

st72324bk

Manufacturer Part Number
st72324bk
Description
3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
Manufacturer
STMicroelectronics
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
st72324bk6
Manufacturer:
ST
0
Part Number:
st72324bk6/MFNTR
Manufacturer:
ST
0
Part Number:
st72324bk6TA
Manufacturer:
FREESCALE
Quantity:
201
Part Number:
st72324bk6TA
Manufacturer:
ST
0
On-chip peripherals
Note:
78/167
Figure 42. Pulse width modulation mode timing example with 2 output compare
1. OC1R = 2ED0h, OC2R = 34E2, OLVL1 = 0, OLVL2 = 1
On timers with only 1 Output Compare register, a fixed frequency PWM signal can be
generated using the output compare and the counter overflow to define the pulse length.
Pulse width modulation mode
Pulse Width Modulation (PWM) mode enables the generation of a signal with a frequency
and pulse length determined by the value of the OC1R and OC2R registers.
Pulse Width Modulation mode uses the complete Output Compare 1 function plus the
OC2R register, and so this functionality can not be used when PWM mode is activated.
In PWM mode, double buffering is implemented on the output compare registers. Any new
values written in the OC1R and OC2R registers are taken into account only at the end of the
PWM period (OC2) to avoid spikes on the PWM output pin (OCMP1).
Procedure to use pulse width modulation mode:
1.
2.
3.
4.
COUNTER 34E2
Load the OC2R register with the value corresponding to the period of the signal using
the formula in the opposite column.
Load the OC1R register with the value corresponding to the period of the pulse if
(OLVL1=0 and OLVL2=1) using the formula in the opposite column.
Select the following in the CR1 register:
Select the following in the CR2 register:
OCMP1
Using the OLVL1 bit, select the level to be applied to the OCMP1 pin after a
successful comparison with the OC1R register.
Using the OLVL2 bit, select the level to be applied to the OCMP1 pin after a
successful comparison with the OC2R register.
Set OC1E bit: the OCMP1 pin is then dedicated to the output compare 1 function.
Set the PWM bit.
Select the timer clock (CC[1:0]) (see
Functions
compare2
FFFC FFFD FFFE
OLVL2
Table
compare1
2ED0 2ED1 2ED2
42).
OLVL1
ST72323 ST72323L
compare2
34E2
OLVL2
FFFC

Related parts for st72324bk