st72324bk STMicroelectronics, st72324bk Datasheet - Page 25

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st72324bk

Manufacturer Part Number
st72324bk
Description
3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
Manufacturer
STMicroelectronics
Datasheet

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ST72323 ST72323L
5
5.1
Caution:
Supply, reset and clock management
The device includes a range of utility features for securing the application in critical
situations (for example in case of a power brown-out), and reducing the number of external
components. An overview is shown in
Main features
Figure 10. Clock, reset and supply block diagram
Multioscillator (MO)
The main clock of the ST7 can be generated by three different source types coming from the
multioscillator block:
Each oscillator is optimized for a given frequency range in terms of consumption and is
selectable through the option byte. The associated hardware configurations are shown in
Table
The OSC1 and/or OSC2 pins must not be left unconnected. For the purposes of Failure
Mode and Effect Analysis, it should be noted that if the OSC1 and/or OSC2 pins are left
unconnected, the ST7 main oscillator may start and, in this configuration, could generate an
f
unsafe/undefined state. The product behaviour must therefore be considered undefined
when the OSC pins are left unconnected.
External clock source
In this external clock mode, a clock signal (square, sinus or triangle) with ~50% duty cycle
has to drive the OSC1 pin while the OSC2 pin is tied to ground.
OSC
RESET
OSC2
OSC1
Reset sequence manager (RSM)
Multioscillator clock management (MO)
an external source
4 crystal or ceramic resonator oscillators
an internal high frequency RC oscillator
clock frequency in excess of the allowed maximum (>16 MHz.), putting the ST7 in an
4. Refer to
5 crystal/ceramic resonator oscillators
1 Internal RC oscillator
Section 11: Electrical characteristics
Oscillator
Reset sequence
(MO)
Multi
manager
(RSM)
f
OSC
divider
Figure
/2
10.
f
OSC2
Supply, reset and clock management
for more details.
clock (MCC/RTC)
with real-time
timer (WDG)
Main clock
Watchdog
controller
to CPU and peripherals
f
CPU
25/167

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