st72324bk STMicroelectronics, st72324bk Datasheet - Page 53

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st72324bk

Manufacturer Part Number
st72324bk
Description
3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
Manufacturer
STMicroelectronics
Datasheet

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ST72323 ST72323L
Caution:
8.3
8.4
8.5
It is recommended not to change the voltage level or loading on any port pin while
conversion is in progress. Furthermore it is recommended not to have clocking pins located
close to a selected analog pin.
The analog input voltage level must be within the limits stated in the absolute maximum
ratings.
I/O port implementation
The hardware implementation on each I/O port depends on the settings in the DDR and OR
registers and specific feature of the I/O port such as ADC Input or true open drain.
Switching these I/O ports from one state to another should be done in a sequence that
prevents unwanted side effects. Recommended safe transitions are illustrated in
Other transitions are potentially risky and should be avoided, since they are likely to present
unwanted side-effects such as spurious interrupt generation.
Figure 26. Interrupt I/O port state transitions
Low-power modes
Table 19.
Interrupts
The external interrupt event generates an interrupt if the corresponding configuration is
selected with DDR and OR registers and the interrupt mask in the CC register is not active
(RIM instruction).
Table 20.
Wait
Halt
External interrupt on selected
external event
Mode
Interrupt event
No effect on I/O ports. External interrupts cause the device to exit from Wait mode.
No effect on I/O ports. External interrupts cause the device to exit from Halt mode.
Effect of low-power modes on I/O ports
I/O port interrupt control/wake-up capability
floating/pull-up
interrupt
Input
01
Event flag
(reset state)
-
floating
Input
00
Enable control bit Exit from Wait Exit from Halt
Description
DDRx
ORx
open-drain
Output
10
XX
= DDR, OR
push-pull
Yes
Output
11
Figure 26
Yes
I/O ports
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