AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 641
AT32AP7002-CTUT
Manufacturer Part Number
AT32AP7002-CTUT
Description
IC MCU 32BIT AVR32 196-CBGA
Manufacturer
Atmel
Series
AVR®32 AP7r
Specifications of AT32AP7002-CTUT
Core Processor
AVR
Core Size
32-Bit
Speed
150MHz
Connectivity
EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²C, LCD, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
D/A 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
196-CBGA
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
Maximum Clock Frequency
150 MHz
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Dac
16 bit, 2 Channel
Package
196CTBGA
Device Core
AVR32
Family Name
AT32
Maximum Speed
150 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
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AT32AP7002
• OPMODE2: OpMode2
Read and write:
0 = no effect.
1 = set to force the OpMode signal (UTMI interface) to “10”, to disable the bit-stuffing and the NRZI encoding.
Note: For the Test mode, Test_SE0_NAK (see Universal Serial Bus Specification, Revision 2.0: 7.1.20, Test Mode Sup-
port). Force the device in High Speed mode, and configure a bulk-type endpoint. Do not fill this endpoint for sending NAK to
the host.
Upon command, a port’s transceiver must enter the High Speed receive mode and remain in that mode until the exit action
is taken. This enables the testing of output impedance, low level output voltage and loading characteristics. In addition,
while in this mode, upstream facing ports (and only upstream facing ports) must respond to any IN token packet with a NAK
handshake (only if the packet CRC is determined to be correct) within the normal allowed device response time. This
enables testing of the device squelch level circuitry and, additionally, provides a general purpose stimulus/response test for
basic functional testing.
641
32054F–AVR32–09/09
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